Output signal generation circuitry for converting an input signal from a source voltage domain into an output signal for a destination voltage domain

A method to convert an input signal from a source voltage domain to an output signal for a destination voltage domain, the method comprising:

• generating, at an output node, the output signal for the destination voltage domain in dependence on the input signal, wherein the destination voltage domain operates from a supply voltage that exceeds a stressing threshold of components within a level shifting circuitry;
• performing a tracking process to ensure that a voltage drop across the components within the level shifting circuitry is less than or equal to the stressing threshold, wherein
• the components within the level shifting circuitry are part of a first gate tracking circuit of a first type and a second gate tracking circuit of a second type that is different than the first type,
• the components of the first gate tracking circuit include first transistors of the first type arranged in series between the input signal and the second gate tracking circuit, wherein the first transistors of the first type include a pair of first transistors that form a first transistor stack with at least one other first transistor,
• the components of the second gate tracking circuit include second transistors of the second type arranged in series between the supply voltage and the first gate tracking circuit, wherein the second transistors of the second type include a pair of second transistors that form a second transistor stack with at least one other second transistor, and
• the tracking process additionally introduces a delay in a change in the output signal in response to a change in the input signal;
• and
• controlling a voltage on the output node to compensate for the delay introduced by the tracking process.

An apparatus to convert an input signal from a source voltage domain to an output signal for a destination voltage domain, the apparatus comprising:

• means for generating, at an output node, the output signal for the destination voltage domain in dependence on the input signal, wherein the means for generating operates from a supply voltage, and wherein the destination voltage domain operates from the supply voltage that exceeds a stressing threshold;
• means for tracking associated with the means for generating, wherein the means for tracking includes a first gate tracker of a first type and a second gate tracker of a second type that is different than the first type,
• the first gate tracker having first transistors of the first type arranged in series between the input signal and the second gate tracker, wherein the first transistors of the first type include a pair of first transistors that form a first transistor stack with at least one other first transistor,
• the second gate tracker having second transistors of the second type arranged in series between the supply voltage and the first gate tracker, wherein the second transistors of the second type include a pair of second transistors that form a second transistor stack with at least one other second transistor,
• wherein the means or tracking ensures that a voltage drop across the first and second transistors is less than or equal to the stressing threshold, and
• wherein the means for tracking additionally introduces a delay in a change in the output signal in response to a change in the input signal;
• and
• means for timing compensation to control a voltage on the output node to compensate for the delay introduced by the means for tracking.