Analog/digital converter with charge rebalanced integrator

A system for sampling a wide-dynamic range analog input signal onto an integration capacitor for conversion into a digital signal, the system comprising:

• a front-end interface circuit for an analog-to-digital converter circuit, the front-end interface circuit including:
• an integration capacitor, wherein the integration circuit integrates charge from a received input signal onto the integration capacitor over an integration time period for being sampled once per integration time period;
• and
• a conditional charge transfer circuit, coupled to the integration capacitor, the conditional charge transfer circuit including:
• a range bounded by a specified first threshold level and a specified second threshold level;
• a charge transfer circuit to transfer, when the signal at the integration capacitor crosses the specified first threshold level, a specified quantity of charge on the integration capacitor in a charge transfer event such that the signal at the integration capcitor re-crosses the specified first threshold level in the other direction, and, to transfer, when the signal at the integration capacitor crosses the specified second threshold level, a specified quantity of charge on the integration capacitor in a charge transfer event such that the signal at the integration capacitor re-crosses the specified second threshold level in the other direction,
• an analog-to-digital converter circuit, coupled to the amplifier circuit output node to receive an analog signal and to convert the analog signal into a digital signal;
• and
• wherein the charge transfer event occurs without resetting the integration capacitor to a specified voltage, and further comprising a notification circuit that provides notification of one or more charge transfer events to permit adjustment of a digital signal value provided by the analog-to-digital converter circuit to account for a net charge provided to the integration capacitor during one or more charge transfer events occurring during the same integration period of the integration capacitor.

A method comprising:

• receiving an input signal;
• integrating, onto an integration capacitor over an integration time period for being sampled once per integration time period, a charge provided by the input signal;
• determining, more often than once per integration period, whether an integration capacitor signal exceeds a specified first threshold level;
• when it is determined that the integration capacitor signal exceeds the specified first threshold level, transferring a specified quantity of charge on the integration capacitor such that the integration capacitor signal no longer exceeds the specified first threshold level;
• providing a sample, at the end of the integration time period, of the integration capacitor signal for further discrete-time processing;
• and
• providing an indication, corresponding to the sample, about the transfers of the specified quantity of charge during the integration period associated with that sample to allow digital adjustment of a digital signal value corresponding to the sample.

A method comprising:

• receiving a computed tomography (CT) imaging input signal;
• integrating, onto an integration capacitor over an integration time period for being sampled once per integration time period, a charge provided by the input signal;
• determining, more often than once per integration period, whether an integration capacitor signal exceeds a specified first threshold level;
• when it is determined that the integration capacitor signal exceeds the specified first threshold level, transferring a specified quantity of charge on the integration capacitor during the integration period such that the integration capacitor signal no longer exceeds the specified first threshold level;
• tracking an indication of the amount of charge added or subtracted from the integration capacitor during the same integration period;
• performing an analog-to-digital conversion of the amplifier output signal value at the end of the integration period to produce a digital value;
• and
• adjusting the digital value using the indication of the amount of charge added or subtracted from the integration capacitor during the same integration period, at the end of which the analog-to-digital conversion is performed to produce the digital value.