Suppression of back-gate transistors in RF CMOS switches built on an SOI substrate
AssigneeQorvo US, Inc.
InventorsPhilip W. Mason, Michael Carroll, Julio C. Costa, Jan Edward Vandemeer, Daniel Charles Kerr
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Abstract
The present disclosure relates to a silicon-on-insulator (SOI) substrate structure with a buried dielectric layer for radio frequency (RF) complementary metal-oxide semiconductor (CMOS) switch fabrications. The buried dielectric layer suppresses back-gate transistors in the RF CMOS switches fabricated on the SOI substrate structure. The SOI substrate structure includes a silicon handle layer, a silicon oxide layer over the silicon handle layer, a buried dielectric layer over the silicon oxide layer, and a silicon epitaxy layer directly over the buried dielectric layer.
Claims20
An apparatus comprising:
- a silicon handle layer;
- a silicon oxide layer over the silicon handle layer;
- a buried dielectric layer over the silicon oxide layer, wherein the buried dielectric layer is not formed from silicon oxide;
- and
- a silicon epitaxy layer over the buried dielectric layer, wherein a top surface of the buried dielectric layer is in contact with a bottom surface of the silicon epitaxy layer, and wherein the buried dielectric layer pins a surface potential at an interface between the buried dielectric layer and the silicon epitaxy layer.
An apparatus comprising:
- a silicon handle layer;
- a silicon oxide layer over the silicon handle layer;
- a buried dielectric layer over the silicon oxide layer, wherein the buried dielectric layer is not formed from silicon oxide;
- and
- a device layer directly over the buried dielectric layer, wherein the device layer includes a plurality of complementary metal-oxide semiconductor (CMOS) switches, and wherein the buried dielectric layer pins a surface potential at an interface between the buried dielectric layer and the device layer.
An apparatus comprising:
- a silicon handle layer;
- a first silicon oxide layer over the silicon handle layer;
- a buried dielectric layer over the first silicon oxide layer, wherein the buried dielectric layer is not formed from silicon oxide;
- a second silicon oxide layer over the buried dielectric layer, wherein the second silicon oxide layer has a thickness between 20 Å and 100 Å, and wherein a top surface of the buried dielectric layer is in contact with a bottom surface of the second silicon oxide layer;
- and
- a device layer over the second silicon oxide layer.
Dependencies are inferred from the claim text.