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US 9,806,182 B2Granted
Parasitic channel mitigation using elemental diboride diffusion barrier regions
AssigneeMACOM Technology Solutions Holdings, Inc.
InventorKevin J. Linthicum
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Abstract
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
Claims19
A semiconductor structure, comprising:
- a silicon substrate and comprising at least a layer having a resistivity of greater than 102 Ohms-cm;
- a diffusion barrier region comprising an elemental diboride located over a surface of the substrate;
- and
- a III-nitride material region located over the diffusion barrier region.
1 more element
A semiconductor structure, comprising:
- a substrate comprising silicon and comprising at least a layer having a resistivity of greater than 102 Ohms-cm;
- a diffusion barrier region comprising an elemental diboride located over a surface of the substrate;
- and
- a III-nitride material region located over the diffusion barrier region,
- wherein the substrate comprises a surface region associated with the surface of the substrate, and the surface region comprises a low-conductivity parasitic channel or the substrate is free of a parasitic channel,
- wherein the low-conductivity parasitic channel has a peak free carrier concentration that is less than about 1017/cm3.
3 more elements
A method of forming a semiconductor structure, comprising:
- forming a diffusion barrier region comprising an elemental diboride over a silicon substrate, the substrate comprising at least a layer having a resistivity of greater than 102 Ohms-cm;
- and
- forming a III-nitride material region over the diffusion barrier region.
Dependencies are inferred from the claim text.