Structure and method for defect passivation to reduce junction leakage for finfet device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorMark van Dal
Life of this patent
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Abstract
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate of a first semiconductor material; shallow trench isolation (STI) features formed in the semiconductor substrate; and a fin-like active region of a second semiconductor material epitaxy grown on the semiconductor substrate. The first semiconductor material has a first lattice constant and the second semiconductor material has a second lattice constant different from the first lattice constant. The fin-like active region further includes fluorine species.
Claims20
A method comprising:
- forming a dielectric isolation feature in a semiconductor substrate;
- removing a portion of the semiconductor substrate to form a recess adjacent to the dielectric isolation feature;
- forming a semiconductor material in the recess, wherein a sidewall of the semiconductor material is adjacent to the dielectric isolation feature;
- removing a portion of the dielectric isolation feature to expose a portion of the sidewall of the semiconductor material;
- incorporating a doping species into the semiconductor material, the doping species selected from the group consisting of sulfur and selenium;
- and
- after forming the semiconductor material in the recess, forming a gate electrode on the semiconductor material.
A method comprising:
- forming a shallow trench isolation (STI) structure in a semiconductor substrate;
- forming a fin structure, the fin structure having a sidewall adjacent to the STI structure;
- recessing the STI structure to expose a portion of the sidewall of the fin structure;
- after the recessing of the STI structure, incorporating a doping species into the fin structure, the doping species selected from the group consisting of sulfur and selenium;
- and
- forming a gate structure over the fin structure.
A method of forming a fin field effect transistor (FinFET) structure, the method comprising:
- forming a plurality of shallow trench isolation (STI) features in a semiconductor substrate of a first semiconductor material, thereby defining a plurality of semiconductor features separated from each other by the STI features;
- recessing the semiconductor features;
- epitaxy growing a second semiconductor material on the recessed semiconductor features to form a plurality of fin active regions of the second semiconductor material, wherein the second semiconductor material has a lattice mismatch with the first semiconductor material, generating threading dislocation defects in the fin active regions;
- and
- performing a fluorine implantation to the fin active regions to deactivate the threading dislocation defects formed in the fin active regions.
Dependencies are inferred from the claim text.