Array substrates, methods for fabricating the same, and display device containing the same

A method for fabricating an array substrate, comprising:

• providing a substrate;
• forming a first pattern on the substrate including a plurality of signal lines and a plurality of electrostatic discharge (ESD) lines, wherein an ESD line is configured to connect two signal lines;
• a signal line is at least one of a gate line, a gate connection line, a common electrode line, a common electrode connection line, a data line, and a data connection line;
• and one end of an ESD line is connected to a first signal line and the other end of the ESD line is connected to a second signal line;
• and
• removing a portion of each ESD line during a process for forming a second pattern over the first pattern to disconnect the two signal lines, wherein:
• the ESD lines are in a same layer as the gate lines;
• each of two ends of an ESD line is connected to at least one of a gate line, a gate connection line, a common electrode line, and a common electrode connection line;
• the gate lines are in a display region;
• the common electrode lines are in a peripheral region;
• the common electrode lines extend in a direction perpendicular to a direction the gate lines extend;
• and
• when the ESD lines are used to connect the gate lines and the common electrode lines, the two ESD lines connected to two adjacent signal lines are distributed at a same side of the peripheral region.

A method for fabricating an array substrate, comprising:

• providing a substrate;
• forming a first pattern on the substrate including a plurality of signal lines and a plurality of electrostatic discharge (ESD) lines, wherein an ESD line is configured to connect two signal lines;
• and
• removing a portion of each ESD line during a process for forming a second pattern over the first pattern to disconnect the two signal lines, wherein:
• each ESD line includes two connecting portions and a discharging portion configured between the two connecting portions;
• for each ESD line, a width of the discharging portion is less than a width of a connecting portion;
• and
• the width of the discharging portion is less than 1.5 μm.