Through-memory-level via structures for a three-dimensional memory device

A three dimensional NAND memory device, comprising:

• word line driver devices located on or over a substrate;
• an alternating stack of word lines and insulating layers located over the word line driver devices;
• a plurality of memory stack structures extending through the alternating stack, each memory stack structure comprising a memory film and a vertical semiconductor channel;
• a plurality of laterally-elongated contact via structures that vertically extend through the alternating stack, laterally extend along a first horizontal direction, and laterally divides the at least one alternating stack into a plurality of laterally spaced-apart memory blocks, wherein the plurality of memory blocks comprises a set of three neighboring blocks including, in order, a first memory block, a second memory block, and a third memory block arranged along a second horizontal direction that is perpendicular to the first horizontal direction, and wherein a first subset of the memory stack structures extends through the first memory block, a second subset of the memory stack structures extends through the second memory block, and a third subset of the memory stack structures extends through the third memory block;
• and
• through-memory-level via structures which electrically couple the word lines in a first memory block to the word line driver devices;
• wherein the through-memory-level via structures extend through a dielectric fill material portion located adjacent to a lengthwise end of the second memory block and between, and laterally spaced apart from each of, a staircase region of the first memory block and a staircase region of the third memory block.