Semiconductor memory device

A semiconductor memory device, comprising:

• a plurality of control gate electrodes arranged in a first direction intersecting an upper surface of a substrate;
• a first semiconductor layer extending in the first direction and facing a plurality of the control gate electrodes from a second direction intersecting the first direction;
• and
• a gate insulating layer provided between the control gate electrode and the first semiconductor layer,
• the first semiconductor layer comprising:
• a first portion extending in the first direction and facing the control gate electrode;
• and
• a second portion provided on a closer side to the substrate than the first portion,
• a film thickness of the first portion in the second direction being larger than a film thickness of the second portion in the second direction,
• the first portion including a crystal grain larger than the film thickness of the first portion in the second direction, and
• the second portion including a monocrystal.

A semiconductor memory device, comprising:

• a plurality of control gate electrodes arranged in a first direction intersecting an upper surface of a substrate;
• a semiconductor layer extending in the first direction and facing a plurality of the control gate electrodes from a second direction intersecting the first direction;
• and
• a gate insulating layer provided between the control gate electrode and the semiconductor layer,
• the semiconductor layer comprising:
• a first portion extending in the first direction and facing the control gate electrode;
• a second portion provided on a closer side to the substrate than the first portion;
• and
• a third portion provided between the first portion and the second portion,
• a film thickness of the first portion in the second direction being larger than a film thickness of the second portion in the second direction, and
• the third portion including a metal atom of nickel (Ni), cobalt (Co), aluminum (Al), or palladium (Pd).