Semiconductor memory device including a sense amplifier on a semiconductor substrate, a memory cell including a capacitor and a transistor including conductive lines electrically connected to the sense amplifier

A semiconductor memory device comprising:

• a semiconductor substrate;
• a sense amplifier on the semiconductor substrate;
• a memory cell array including a memory cell above the sense amplifier, the memory cell including a capacitor and a first transistor, the capacitor including a first electrode and a second electrode, the first transistor including a first current path and a first control electrode controlling an on/off of the first current path, the first current path including a first terminal and a second terminal, the first terminal being electrically connected to the first electrode;
• a first conductive line electrically connected to the second terminal and extending along an upper surface of the semiconductor substrate in a first direction, the first conductive line being electrically connected to the sense amplifier;
• a second transistor including a second current path and a second control electrode controlling an on/off of the second current path, the second current path including a third terminal and a fourth terminal, and the third terminal being electrically connected to the first conductive line;
• and
• a second conductive line electrically connected to the fourth terminal,
• wherein the second current path is provided between the first and second conductive lines, the second conductive line is electrically connected to a power source having a predetermined potential, and the first conductive line is set to the predetermined potential by turning on the second current path,
• wherein the second transistor is disposed above the sense amplifier and apart from the semiconductor substrate, and
• wherein the first current path comprises a first semiconductor layer, and the second current path comprises a second semiconductor layer.