FinFET spacer formation on gate sidewalls, between the channel and source/drain regions

A method comprising:

• providing an intermediate semiconductor structure comprising a substrate having one or more fin having a first plurality and a second plurality of gates disposed thereon, and a first plurality of spacers disposed on sides of the first plurality and the second plurality of gates;
• depositing a first liner on the intermediate semiconductor structure;
• depositing a fill material at a level along inner portions of the first liner between the first plurality and second plurality of gates adjacent to the one or more fin;
• removing outer portions of the first spacers and the first liner away from the fill material, the remaining portions of the first spacers and the first liner disposed adjacent to the one or more fin defining a first thickness;
• and
• depositing a second liner having a second thickness over the first plurality and the second plurality of gates and over the remaining portions of the first spacers and the first liner, and the fill material, and wherein the first thickness is greater than the second thickness.