Reinforced wafer level package comprising a core layer for reducing stress in a solder joint and improving solder joint reliability

A package on package (PoP) device comprising:

• a first package;
• and
• a second package coupled to the first package, the second package comprising
• a redistribution portion comprising:
• a first photo imageable dielectric (PID) layer;
• and
• a first interconnect, wherein the first interconnect comprises a first via in the first photo imageable dielectric (PID) layer, wherein the first via comprises a diameter of about 30 (μm) microns or less;
• a first die comprising a pad, the first die coupled to the redistribution portion, wherein the first die is coupled to the first interconnect of the redistribution portion such that the pad is directly touching the first interconnect of the redistribution portion;
• a core layer coupled to the redistribution portion;
• a via traversing the core layer;
• an encapsulation layer encapsulating the first die and the core layer;
• and
• a second interconnect in the encapsulation layer, wherein the second interconnect is coupled to the via.