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US 9,806,027 B2Granted
Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorDaeshik Kim
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes an interlayer dielectric on a semiconductor substrate, a contact plug penetrating the interlayer dielectric, a pillar pattern disposed on the interlayer dielectric and having a central axis laterally offset from a central axis of the contact plug, a pad extending on the contact plug and along a sidewall of the pillar pattern, the pad being electrically connected to the contact plug, and a data storage portion on the pillar pattern and electrically connected to the pad.
Claims20
A semiconductor device, comprising:
- an interlayer dielectric on a semiconductor substrate;
- a contact plug penetrating the interlayer dielectric;
- a pillar pattern disposed on the interlayer dielectric and having a central axis laterally offset from a central axis of the contact plug;
- a pad extending on the contact plug and along an outermost sidewall of the pillar pattern, the pad being electrically connected to the contact plug;
- and
- a data storage portion on the pillar pattern and electrically connected to the pad,
- wherein the pad covers the outermost sidewall of the pillar pattern.
4 more elements
A semiconductor device, comprising:
- a substrate including a plurality of memory cells;
- and
- an interlayer dielectric covering the substrate,
- wherein each of the memory cells includes:
- a contact plug penetrating the interlayer dielectric,
- a pillar pattern on the interlayer dielectric and having a different central axis from that of the contact plug, the central axes of the pillar pattern and the contact plug extending along respective longitudinal directions of the pillar pattern and the contact plug,
- a pad covering the contact plug and being electrically connected to the contact plug, the pad extending along a sidewall of the pillar pattern, and
- a data storage portion on the pillar pattern and electrically connected to the pad, and
- wherein among the memory cells constituting a single row, a distance between central axes of a contact plug and a pillar pattern included in one memory cell is different from a distance between axes of a contact plug and a pillar pattern included in an adjacent memory cell.
6 more elements
A semiconductor device, comprising:
- an interlayer dielectric on a semiconductor substrate;
- a contact plug penetrating the interlayer dielectric;
- a pillar pattern on the interlayer dielectric and having a central axis laterally offset from a central axis of the contact plug;
- a data storage portion on the pillar pattern;
- a pad electrically connecting the data storage portion to the contact plug, the pad continuously extending along a sidewall of the pillar pattern and on at least a portion of an upper surface of the contact plug;
- and
- an upper interlayer dielectric on the interlayer dielectric, the upper interlayer dielectric covering the pad,
- wherein the pad covers the sidewall of the pillar pattern, and
- wherein the upper interlayer dielectric completely covers the pad, a portion of the pad separating the sidewall of the pillar pattern from the upper interlayer dielectric.
6 more elements
Dependencies are inferred from the claim text.