Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions
AssigneeSTMicroelectronics S.r.l.
InventorJohn H. Zhang
Life of this patent
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AssigneeSTMicroelectronics S.r.l.
InventorJohn H. Zhang
Estimating the term…
A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.
A device, comprising:
A device, comprising:
A device, comprising:
Dependencies are inferred from the claim text.