Multi-reference integrated heat spreader (IHS) solution

A method of forming a multi-chip package, comprising:

• depositing a first thermal interface material layer on a plurality of semiconductor dies on a substrate;
• transferring an individual integrated heat spreader slug onto the die, wherein transferring the IHS slug onto the plurality of semiconductor dies includes applying, when the IHS slug is on the first thermal interface material layer, a force to the IHS slug to assist with causing the first thermal interface material layer to have a predetermined bond line thickness (BLT);
• and
• thermally coupling an integrated heat spreader lid (IHS lid) to the IHS slug, wherein the IHS lid has a plurality of cavities formed in a central region of the IHS lid, the plurality of cavities including at least one or more sidewalls formed into the IHS lid, wherein the plurality of cavities includes an intermediate level thermal interface material layer having different thicknesses formed on each sidewall of the plurality of cavities, wherein the IHS slug is between the intermediate level thermal interface material layer and the first thermal interface material layer on the die, wherein the IHS lid being on the intermediate level thermal interface material layer, the IHS slug, and the first thermal interface material layer on the component, respectively, and wherein the intermediate level thermal interface material layer is embedded between each sidewall of the plurality of cavities and the IHS slug.

A computing device comprising:

• a circuit board;
• and
• a semiconductor package coupled to the circuit board, the package including:
• a component on a substrate, the component including two or more semiconductor dies;
• and
• an integrated heat spreader (IHS) solution, the IHS solution including:
• an IHS lid, the IHS lid including a plurality of cavities formed in a central region of the IHS lid, the plurality of cavities including at least one or more sidewalls formed into the IHS lid, wherein the plurality of cavities includes an intermediate level thermal interface material layer having different thicknesses formed on each sidewall of the plurality of cavities;
• and
• an individual IHS slug on a first thermal interface material layer on the component, wherein the IHS slug is between the intermediate level thermal interface material layer and the first thermal interface material layer on the component, wherein the IHS lid being on the intermediate level thermal interface material layer, the IHS slug, and the first thermal interface material layer on the component respectively, and wherein the intermediate level thermal interface material layer is embedded between each sidewall of the plurality of cavities and the IHS slug.