High κ gate stack on III-V compound semiconductors

A semiconductor structure comprising:

• a III-V compound semiconductor material having a topmost surface that is essentially free of native oxides;
• a material stack located on said III-V compound semiconductor material;
• and
• a source/drain diffusion region located adjacent a pair of opposing sides of, and spaced apart from, said material stack, wherein each source/drain diffusion region has a topmost surface that is located above said topmost surface of said III-V compound semiconductor material and a bottommost surface that contacts a portion of said III-V compound semiconductor material that is located beneath said topmost surface of III-V compound semiconductor material, wherein said material stack comprises:
• a base semiconductor layer comprising a first semiconductor material located directly on said topmost surface of said III-V compound semiconductor material, wherein the first semiconductor material includes at least one of Ge alloys, SiGe, SiC and SiGeC;
• a layer of AOxNy located on an upper portion of said base semiconductor layer, wherein A is said first semiconductor material, x is from 0 to 1, y is from 0 to 1, with the proviso that when x is 0, y is not 0 or when y is 0, x is not 0, and wherein an interface is present between said topmost surface of said III-V compound semiconductor material and a bottommost surface of said base semiconductor layer that has an interface state density of about 1012 cm−2 eV−1 or less, and
• a dielectric material located directly on said layer of AOxNy, said dielectric material having a dielectric constant that is greater than silicon dioxide and comprising a metal oxide or a mixed metal oxide.