Formation of contact/via hole with self-alignment

A method for manufacturing a semiconductor device, the method comprising:

• providing a substrate on which at least two devices and an etch stop layer covering the devices are formed;
• forming a first dielectric layer covering the etch stop layer;
• performing a first stage etching operation on a top surface of the first dielectric layer to form a recess portion in the first dielectric layer, wherein the recess portion is located between and above the devices;
• forming a second dielectric layer to cover and directly physically contact the top surface of the first dielectric layer and a side surface and a bottom of the recess portion;
• removing a portion of the second dielectric layer to immediately expose the top surface of the first dielectric layer and a portion of the bottom of the recess portion to form a dielectric spacer on the side surface of the recess portion;
• after forming the dielectric spacer on the side surface of the recess portion, performing a second stage etching operation on the first dielectric layer through the recess portion to form a hole between the devices, wherein the hole extends from the top surface of the first dielectric layer to a bottom surface of the first dielectric layer to expose a portion of the etch stop layer;
• etching said portion of the etch stop layer exposed by the hole in the first dielectric layer until the substrate is exposed;
• removing the dielectric spacer to generate a via hole having a step-profile with a wider opening;
• and
• filling the via hole with a conductive material through the wider opening to form a via/contact connector.