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US 9,805,929 B2Granted
Method of forming fine patterns in a semiconductor device and method of manufacturing an electronic device
AssigneeSamsung Electronics Co., Ltd.
InventorYun Suk Nam
Life of this patent
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Abstract
Methods of forming fine patterns having a width and a pitch in semiconductor devices may be used to form a semiconductor device or electronic device. The fine patterns may be formed by forming sacrificial pillars, which in certain examples may be formed from spacer patterns.
Claims20
A method of manufacturing an electronic device, the method comprising:
- providing a semiconductor substrate and an insulating layer on the semiconductor substrate;
- forming a plurality of first spacer patterns extending in a first direction on the insulating layer;
- forming a first planarized layer on the first spacer patterns;
- forming a plurality of line mask patterns extending in a second direction on the first planarized layer, the second direction crossing the first direction;
- forming a plurality of sacrificial pillars by patterning the first spacer patterns using the line mask patterns as etch masks;
- forming a second planarized layer filling gaps between the sacrificial pillars;
- forming a plurality of openings in the second planarized layer by removing some of the sacrificial pillars;
- and
- forming a plurality of holes in the insulating layer by etching the insulating layer using the second planarized layer having the openings as an etch mask.
6 more elements
A method of manufacturing a semiconductor device, the method comprising:
- forming a first hard mask layer on an insulating layer;
- forming a plurality of sacrificial pillars on the first hard mask layer, the plurality of sacrificial pillars being spaced apart from each other in a first and a second direction, and the first direction being substantially perpendicular to the second direction;
- forming a planarized layer filling gaps between the sacrificial pillars;
- forming a plurality of openings in the planarized layer by removing some of the sacrificial pillars so as to expose some portions of the first hard mask layer;
- forming a hard mask pattern by patterning the first hard mask layer using the planarized layer having the openings as an etch mask;
- and
- forming a plurality of holes in the insulating layer by etching the insulating layer using the hard mask pattern as an etch mask.
4 more elements
A method of manufacturing an electronic device, the method comprising:
- providing a semiconductor substrate;
- providing an insulating layer on the semiconductor substrate;
- forming a plurality of first spacer patterns on the substrate, the plurality of first spacer patterns extending in a first direction;
- forming a plurality of second spacer patterns on the substrate, the plurality of second spacer patterns extending in a second direction and crossing the plurality of first spacer patterns;
- using the second spacer patterns to form spacer mask pillars from the first spacer patterns;
- removing some of the spacer mask pillars to form holes in the insulating layer;
- and
- filling the holes with a conductive material.
5 more elements
Dependencies are inferred from the claim text.