Address circuit

A system comprising:

• an image capturing component to capture image data;
• a data buffer to receive the image data from the image capturing component and to store the image data, the image data stored in the data buffer and accessible according to a set of address bits, the set of address bits having high order address bits and low order address bits;
• an address circuit to receive the set of address bits and to generated incremented address bits by performing operations to shift the high order address bits and the low order address bits in a rightward direction by a number of bits, shift the low order address bits in a leftwards direction by the number of bits, shift the high order address bits and the low order address bits in the leftward direction by the number of bits, increment the set of address bits, shift the high order address bits and the low order address bits in the rightward direction by a number of bits, shift the low order address bits in the rightward direction by the number of bits, and shift the high order address bits and the low order address bits in the leftward direction by the number of bits;
• and
• an image processing unit to perform at least one operation on the image data stored in the data buffer based at least in part on the incremented address bits.