Electrical fuse bit cell and mask set
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPo-Hung Chen, Liang Chuan Chang, Wei-Fen Pai, Bai-Mei Chang, Shao-Yu Chou, Ren-Fen Tsui, Dian-Sheg Yu, Shih-Guo Shen
Life of this patent
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Abstract
A bit cell includes a program device comprising a first source/drain region and a second source/drain region separated by a first channel. The first source/drain region, the second source/drain region, and the first channel are positioned along a first direction. The bit cell also includes an electrical fuse (eFuse) having a conduction path along the first direction. A conductive element is electrically connected with the first source/drain region and one end of the eFuse.
Claims20
A bit cell comprising:
- a program device comprising a first source/drain region and a second source/drain region separated by a first channel, the first source/drain region, the second source/drain region, and the first channel being positioned along a first direction;
- an electrical fuse (eFuse), the eFuse comprising a conduction path along the first direction;
- and
- a conductive element electrically connected with the first source/drain region and an end of the eFuse.
An integrated circuit comprising:
- a first transistor comprising a first source/drain region and a second source/drain region separated by a channel, the channel having a channel width direction;
- an electrical fuse (eFuse) comprising a conduction path perpendicular to the channel width direction;
- and
- a conductive element electrically connected with the first source/drain region and an end of the eFuse, the conductive element being oriented in the channel width direction.
A set of masks corresponding to an integrated circuit layout, the integrated circuit layout comprising:
- an electrical fuse (eFuse) bit cell having a first orientation direction and a second orientation direction perpendicular to the first orientation direction, the eFuse bit cell comprising:
- an eFuse comprising a conduction path along the first orientation direction;
- a first source/drain region;
- a second source/drain region;
- and
- a conductive element oriented in the second orientation direction and electrically connected with the first source/drain region and an end of the eFuse,
- wherein the eFuse and the first source/drain region are aligned in the second orientation direction,
- wherein the set of masks is formed based on the integrated circuit layout.
Dependencies are inferred from the claim text.