Memory system performing wear leveling using average erase count value and operating method thereof
AssigneeSK hynix Inc.
InventorsJin-Woong Kim, Byeong-Gyu Park
Life of this patent
Estimating the term…
Loading patent…
AssigneeSK hynix Inc.
InventorsJin-Woong Kim, Byeong-Gyu Park
Estimating the term…
A memory system may include a memory device including 0th to N-1th memory blocks, wherein N is a positive integer; and a controller having a first list and a second list, wherein the first list includes 0th to N-1th erase count values respectively for the 0th to N-1th memory blocks, wherein the second list includes 0th to N-1th difference values respectively for the 0th to N-1th memory blocks, wherein each of the 0th to N-1th difference values is a difference between an average value of the 0th to N-1th erase count values and each of the 0th to N-1th erase count values, wherein the controller selects a source block and a target block among the 0th to N-1th memory blocks depending on the 0th to N-1th erase count values included in the first list and the 0th to N-1th difference values included in the second list to perform a wear leveling between the source block and the target block.
A memory system comprising:
A method of operating a memory system comprising:
Dependencies are inferred from the claim text.