Non-volatile memory cell and method of operating the same
AssigneeeMemory Technology Inc.
InventorsHsueh-Wei Chen, Wei-Ren Chen, Wein-Town Sun
Life of this patent
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Abstract
A non-volatile memory cell includes a substrate, a select gate, a floating gate, and an assistant control gate. The substrate includes a first diffusion region, a second diffusion region, a third diffusion region, and a fourth diffusion region. The select gate is formed above the first diffusion region and the second diffusion region in a polysilicon layer. The floating gate is formed above the second diffusion region, the third diffusion region and the fourth diffusion region in the polysilicon layer. The assistant control gate is formed above the floating gate in a metal layer, wherein an area of the assistant control gate overlaps with at least half an area of the floating gate.
Claims14
A non-volatile memory cell, comprising
- a substrate including a first diffusion region, a second diffusion region, a third diffusion region, and a fourth diffusion region;
- a select gate formed above the first diffusion region and the second diffusion region in a polysilicon layer;
- a floating gate formed above the second diffusion region, the third diffusion region and the fourth diffusion region in the polysilicon layer;
- and
- an assistant control gate formed above the floating gate in a metal layer, wherein an area of the assistant control gate overlaps with at least half an area of the floating gate.
A method of operating a non-volatile memory cell which includes:
- a substrate including a first diffusion region, a second diffusion region, a third diffusion region, and a fourth diffusion region;
- a select gate formed above the first diffusion region and the second diffusion region in a polysilicon layer;
- a floating gate formed above the second diffusion region, the third diffusion region and the fourth diffusion region in the polysilicon layer;
- and
- an assistant control gate formed above the floating gate in a metal layer, wherein an area of the assistant control gate overlaps with at least half an area of the floating gate;
- the method comprising:
- applying a first voltage to the fourth diffusion region and applying a second voltage to the assistant control gate so as to bring electrons onto the floating gate during a program mode of operation;
- applying a third voltage to the fourth diffusion region and applying a fourth voltage to the assistant control gate as to drag electrons out of the floating gate during an erase mode of operation;
- wherein:
- the first voltage and the second voltage are between 0 and a first positive value;
- the third voltage is between 0 and a second positive value;
- and
- the fourth voltage is between 0 and a first negative value.
Dependencies are inferred from the claim text.