Scan driving circuit and NOR gate logic operation circuit thereof
AssigneeShenzhen China Star Optoelectronics Technology Co., Ltd.
InventorChao Dai
Life of this patent
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Abstract
The disclosure is related to a scan driving circuit for an oxide semiconductor thin film transistor and the NOR gate logic operation circuit thereof. The NOR gate logic operation circuit includes a first invertor and a second invertor applied in the pull down holding circuit of the GOA circuit, and a plurality of transistors. The combination of the NTFT and the invertor displaces the original function of the PMOS element to realize a characteristic similar to an original COMS NOR operation circuit, thereby solving a design problem of the logic operation circuit using a IGZO TFT single element, such that a larger scale digital integrated circuit is further suitably integrated into the liquid crystal display.
Claims13
A NOR gate logic operation circuit of a display scan driving circuit for a display device, wherein the NOR gate logic operation circuit comprising:
- a first invertor and a second invertor applied in a pull down holding circuit of a Gate-Driver-On-Array (GOA) circuit;
- a thirteenth transistor, a gate of the thirteenth transistor directly connected to an output terminal of the first invertor, a drain of the thirteenth transistor directly connected to a high potential of a constant voltage;
- a fourteenth transistor, a gate of the fourteenth transistor directly connected to an output terminal of the second invertor, a drain of the fourteenth transistor directly connected to a source of the thirteenth transistor, a source of the fourteenth transistor directly connected to an output terminal of the logic operation circuit;
- a fifteenth transistor, a gate of the fifteenth transistor directly connected to a first input terminal of the logic operation circuit, a drain of the fifteenth transistor directly connected to the output terminal of the logic operation circuit, a source of the fifteenth transistor directly connected to a low potential of the constant voltage;
- and
- a sixteenth transistor, a gate of the sixteenth transistor directly connected to a second input terminal of the logic operation circuit, a drain of the sixteenth transistor directly connected to the output terminal of the logic operation circuit, a source of sixteenth transistor directly connected to the low potential of the constant voltage;
- wherein the first invertor and the second invertor receive a circuit control signal through the low potential of the constant voltage and a first negative potential;
- and
- wherein the first invertor receives a circuit control signal through the low potential of the constant voltage and the first negative potential, and the second invertor receives the circuit control signal through the high potential of the constant voltage and the low potential of the constant voltage.
A NOR gate logic operation circuit of a display scan driving circuit for a display device, wherein the NOR gate logic operation circuit comprising:
- a first invertor and a second invertor applied in a pull down holding circuit of a Gate-Driver-On-Array (GOA) circuit;
- a thirteenth transistor, a gate of the thirteenth transistor directly connected to an output terminal of the first invertor, a drain of the thirteenth transistor directly connected to a high potential of a constant voltage;
- a fourteenth transistor, a gate of the fourteenth transistor directly connected to an output terminal of the second invertor, a drain of the fourteenth transistor directly connected to a source of the thirteenth transistor, a source of the fourteenth transistor directly connected to an output terminal of the logic operation circuit;
- a fifteenth transistor, a gate of the fifteenth transistor directly connected to a first input terminal of the logic operation circuit, a drain of the fifteenth transistor directly connected to the output terminal of the logic operation circuit, a source of the fifteenth transistor directly connected to a low potential of the constant voltage;
- and
- a sixteenth transistor, a gate of the sixteenth transistor directly connected to a second input terminal of the logic operation circuit, a drain of the sixteenth transistor directly connected to the output terminal of the logic operation circuit, a source of sixteenth transistor directly connected to the low potential of the constant voltage;
- wherein the first invertor receives a circuit control signal through the low potential of the constant voltage and a first negative potential, and the second invertor receives the circuit control signal through the high potential of the constant voltage and the low potential of the constant voltage.
A display scan driving circuit for an oxide semiconductor thin film transistor of a display device, wherein the display scan driving circuit comprises a NOR gate logic operation circuit for the display device, the NOR gate logic operation circuit comprising:
- a first invertor and a second invertor applied in a pull down holding circuit of a Gate-Driver-On-Array (GOA) circuit;
- a thirteenth transistor, a gate of the thirteenth transistor directly connected to an output terminal of the first invertor, a drain of the thirteenth transistor directly connected to a high potential of a constant voltage;
- a fourteenth transistor, a gate of the fourteenth transistor directly connected to an output terminal of the second invertor, a drain of the fourteenth transistor directly connected to a source of the thirteenth transistor, a source of the fourteenth transistor directly connected to an output terminal (Vout) of the logic operation circuit;
- a fifteenth transistor, a gate of the fifteenth transistor is directly connected to a first input terminal of the logic operation circuit, a drain of the fifteenth transistor directly connected to the output terminal of the logic operation circuit, a source of the fifteenth transistor directly connected to a low potential of the constant voltage;
- and
- a sixteenth transistor, a gate of the sixteenth transistor directly connected to a second input terminal of the logic operation circuit, a drain of the sixteenth transistor directly connected to the output terminal of the logic operation circuit, a source of sixteenth transistor directly connected to the low potential of the constant voltage;
- wherein the first invertor receives a circuit control signal through the low potential of the constant voltage and a first negative potential, and the second invertor receives the circuit control signal through the high potential of the constant voltage and the low potential of the constant voltage.
Dependencies are inferred from the claim text.