Shift register, array substrate and display apparatus

A shift register comprising a triggering module, an output module, an input terminal, a first output terminal and a second output terminal, wherein:

• an output terminal of the trigger module is connected to the second output terminal, and is configured to, according to an input signal from the input terminal, output a triggering signal that has a phase the same as the input signal and delays half a clock cycle more than the input signal to the second output terminal and the output module under the action of a clock signal;
• an input terminal of the output module is connected to the output terminal of the trigger module, and is configured to output an output signal that has a phase opposite to the input signal and delays half a clock cycle more than the input signal to the first output terminal under the triggering of the triggering signal and under the action of the clock signal;
• and
• an operating voltage of a signal outputted from the first output terminal is supplied by a direct current power supply,
• wherein the triggering module comprises six switching elements and one capacitor, wherein:
• a second terminal of a first switching element is connected to the input terminal, a first terminal thereof is connected to a first terminal of a second switching element, a first terminal of the capacitor, and a control terminal of a sixth switching element;
• a second terminal of the second switching element is connected to a control terminal of a third switching element;
• a first terminal of the third switching element is connected to a second terminal of a fourth switching element, and a control terminal of a fifth switching element;
• a first terminal of the fourth switching element is connected to a control terminal thereof;
• and
• a first terminal of the fifth switching element is connected to a second terminal of the capacitor, and a second terminal of the sixth switching element, and connected to the second output terminal and the output module.