Synapse circuit and neuromorphic system including the same
AssigneesSamsung Electronics Co., Ltd., Postech Academy-Industry Foundation
InventorsJun Seok Kim, Jae Yoon Sim, Hyun Surk Ryu
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Abstract
A synapse circuit to perform spike timing dependent plasticity (STDP) operation is provided. The synapse circuit includes a memristor having a resistance value, a transistor connected to the memristor, and the transistor configured to receive at least two input signals. The resistance value of the memristor is changed based on a time difference between the at least two input signals received by the transistor.
Claims19
A synapse circuit to perform spike timing dependent plasticity (STDP) operation, the synapse circuit comprising:
- a memristor having a resistance value;
- and
- a transistor connected to the memristor, the transistor configured to receive at least two input signals,
- wherein the resistance value of the memristor is changed based on a time difference between the at least two input signals received by the transistor,
- wherein terminals of the memristor are respectively coupled to a reference voltage and a drain terminal of the transistor,
- wherein the at least two input signals comprise a first input signal applied to a gate terminal of the transistor and a second input signal applied to a source terminal of the transistor, and
- wherein the first input signal is provided by a pre-synaptic neuron circuit and the second input signal is provided by a post-synaptic neuron circuit.
A neuromorphic system comprising:
- a synapse circuit configured to perform spike timing dependent plasticity (STDP) operation, the synapse circuit comprising a first terminal, a second terminal, a memristor having a resistance value, and a transistor connected to the memristor;
- a pre-synaptic neuron circuit connected to the memristor through the first terminal of the synapse circuit;
- and
- a post-synaptic neuron circuit connected to the memristor through the second terminal of the synapse circuit,
- wherein the resistance value of the memristor is changed based on a time difference between at least two input signals received by the synapse circuit,
- wherein terminals of the memristor are respectively coupled to a reference voltage and a drain terminal of the transistor,
- wherein the at least two input signals comprise a first input signal applied to a gate terminal of the transistor and a second input signal applied to a source terminal of the transistor, and
- wherein the first input signal is provided by a pre-synaptic neuron circuit and the second input signal is provided by a post-synaptic neuron circuit.
A method of performing spike timing dependent plasticity (STDP) operation between a pre-synaptic neuron circuit and a post-synaptic neuron circuit, the method comprising:
- receiving a pre-synaptic input signal from the pre-synaptic neuron circuit, the pre-synaptic input signal comprising a first input signal applied to a gate terminal of a transistor;
- receiving a post-synaptic input signal from the post-synaptic neuron circuit, the post-synaptic input signal comprising a second input signal applied to a source terminal of the transistor;
- and
- adjusting a resistance value of a memristor based on a time difference between the pre-synaptic input signal and the post-synaptic input signal,
- wherein the post-synaptic input signal is based on a charge stored in a capacitor of the post synaptic neuron circuit.
Dependencies are inferred from the claim text.