Computational resource pipelining in general purpose graphics processing unit

A method of processing data with a general purpose graphics processing unit (GPGPU), the method comprising:

• configuring, by one or more application programming interfaces (APIs) executed by a control unit of the GPGPU, two or more programmable parallel processing units of the GPGPU to operate selectively as stages of a processing pipeline that send data to directly connected programmable local memory buffers and receive data from directly connected programmable local memory buffers;
• configuring, by the one or more APIs executed by the control unit of the GPGPU, each of one or more programmable local memory buffers of the GPGPU directly connected between at least two of the parallel processing units in the processing pipeline to have a width necessary to hold data for transfer between the parallel processing units;
• and
• preserving, by a sequence manager executed by the control unit of the GPGPU, data sequence within the processing pipeline implemented by the two or more programmable parallel processing units and the one or more programmable local memory buffers, wherein preserving the data sequence comprises executing a sequence-determining counter upon entry of a data set to at least one of the parallel processing units to record a sequence of data threads of the data set, and executing a sequence-enforcing barrier upon exit of the data set from the at least one of the parallel processing units to release the data threads of the data set from the parallel processing unit in the same sequence as recorded by the sequence-determining counter.

A general purpose graphics processing unit (GPGPU) comprising:

• means for executing one or more application programming interfaces (APIs) to configure two or more programmable parallel processing units of the GPGPU to operate selectively as stages of a processing pipeline that send data to directly connected programmable local memory buffers and receive data from directly connected programmable local memory buffers;
• means for executing the one or more APIs to configure each of one or more programmable local memory buffers of the GPGPU directly connected between at least two of the parallel processing units in the processing pipeline to have a width necessary to hold data for transfer between the parallel processing units;
• and
• means for executing a sequence manager to preserve data sequence within the processing pipeline implemented by the two or more programmable parallel processing units and the one or more programmable local memory buffers, wherein the means for preserving the data sequence comprises means for executing a sequence-determining counter upon entry of a data set to at least one of the parallel processing units to record a sequence of data threads of the data set, and means for executing a sequence-enforcing barrier upon exit of the data set from the at least one of the parallel processing units to release the data threads of the data set from the parallel processing unit in the same sequence as recorded by the sequence-determining counter.

A non-transitory computer-readable medium comprising instructions for processing data with a general purpose graphics processing unit (GPGPU) that, when executed, cause a programmable processor of a control unit of the GPGPU to:

• execute one or more application programming interfaces (APIs) to configure two or more programmable parallel processing units of the GPGPU to operate selectively as stages of a processing pipeline that send data to directly connected programmable local memory buffers and receive data from directly connected programmable local memory buffers;
• execute the one or more APIs to configure each of one or more programmable local memory buffers of the GPGPU directly connected between at least two of the parallel processing units in the processing pipeline to have a width necessary to hold data for transfer between the parallel processing units;
• and
• execute a sequence manager to preserve data sequence within the processing pipeline implemented by the two or more programmable parallel processing units and the one or more programmable local memory buffers, wherein the instructions case the programmable processor to execute a sequence-determining counter upon entry of a data set to at least one of the parallel processing units to record a sequence of data threads of the data set, and execute a sequence-enforcing barrier upon exit of the data set from the at least one of the parallel processing units to release the data threads of the data set from the parallel processing unit in the same sequence as recorded by the sequence-determining counter.