Semiconductor device for reducing power consumption in low power mode and system including same
AssigneeSamsung Electronics Co., Ltd.
InventorsKwang Hee Choi, Oh Sung Kwon, Tae Min Jeong
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Abstract
A semiconductor device can reduce power consumption in a low power mode and includes a first input/output circuit configured to detect a first entry signal transiting at a first time and output a detection signal indicating an entry into a power saving mode according to a result of the detection. A second input/output circuit is configured to receive a second entry signal transiting at a second time earlier than the first time, and a control circuit is configured to block power supplied to the second input/output circuit in response to the detection signal indicating the entry.
Claims20
A semiconductor device comprising:
- a first input/output circuit configured to detect a first entry signal transiting at a first time and output a detection signal indicating an entry into a power saving mode according to a result of the detection;
- a second input/output circuit configured to receive a second entry signal transiting at a second time earlier than the first time;
- and
- a control circuit configured to block power supplied to the second input/output circuit in response to the detection signal indicating the entry into the power saving mode.
A semiconductor system comprising:
- a first semiconductor device;
- a second semiconductor device;
- and
- a first lane and a second lane connected between the first semiconductor device and the second semiconductor device;
- wherein the second semiconductor device includes
- a first input/output circuit connected to the first lane, configured to detect a first entry signal transiting at a first time, and configured to output a detection signal indicating an entry into a power saving mode according to a result of the detection;
- a second input/output circuit connected to the second lane, and configured to receive a second entry signal transiting at a second time earlier than the first time;
- and
- a control circuit configured to block power supplied to the second input/output circuit in response to the detection signal indicating the entry into the power saving mode.
A method of operating a semiconductor system including a first semiconductor device and a second semiconductor device connected with a first lane and a second lane, the method comprising:
- detecting, with a first input/output circuit of the second semiconductor device connected to the first lane, a first entry signal transiting at a first time, and outputting a detection signal indicating an entry into a power saving mode according to a result of the detection;
- receiving, with a second input/output circuit of the second semiconductor device connected to the second lane, a second entry signal transiting at a second time earlier than the first time;
- and
- blocking, with a control circuit of the second semiconductor device, power supplied to the second input/output circuit in response to the detection signal indicating the entry into the power saving mode.
Dependencies are inferred from the claim text.