Speculative addressing using a virtual address-to-physical address page crossing buffer
AssigneeQUALCOMM Incorporated
InventorsSuresh K. Venkumahanti, Jiajin Tu, Phillip M. Jones
Life of this patent
Estimating the term…
Abstract
A method includes receiving an instruction to be executed by a processor. The method further includes performing a lookup in a page crossing buffer that includes one or more entries to determine if the instruction has an entry in the page crossing buffer. Each of the entries includes a physical address. The method further includes, when the page crossing buffer has the entry in the page crossing buffer, retrieving a particular physical address from the entry in the page crossing buffer.
Claims24
A method comprising:
- receiving an instruction of a sequence of instructions to be executed by a processor, each of the instructions stored in memory;
- performing a lookup in a page crossing buffer to determine whether the page crossing buffer has an associated entry corresponding to the instruction, the page crossing buffer configured to store one or more entries, each of the one or more entries including an instruction address of a particular instruction and a physical address that corresponds to a next sequential instruction that follows the particular instruction in the sequence of instructions;
- and
- based on a determination that the page crossing buffer has the associated entry corresponding to the instruction:
- selecting a first physical address retrieved from the associated entry in the page crossing buffer, the first physical address corresponding to a second instruction that follows the instruction in the sequence of instructions;
- and
- performing a tag array operation based on the selected first physical address to locate a tag array entry corresponding to the second instruction.
An apparatus comprising:
- a page crossing buffer configured to store one or more entries, each of the one or more entries including an instruction address of a particular instruction and a physical address that corresponds to a next sequential instruction that follows the particular instruction in a sequence of instructions stored in memory;
- a multiplexer configured to select a first physical address based on a determination that the page crossing buffer includes an entry corresponding to an instruction, the first physical address retrieved from the entry in the page crossing buffer, and the first physical address corresponding to a second instruction that follows the instruction in the sequence of instructions;
- and
- a tag array configured to perform a tag array operation based on the selected first physical address to locate a tag array entry corresponding to the second instruction.
An apparatus comprising:
- means for storing one or more entries, each of the one or more entries including an instruction address associated with a particular instruction and a physical address that corresponds to a next sequential instruction that follows the particular instruction in a sequence of instructions;
- means for selecting a first physical address in response to a determination that the means for storing includes an associated entry corresponding to an instruction of the sequence of instructions, the first physical address retrieved from the associated entry in the means for storing, and the first physical address corresponding to a second instruction that follows the instruction in the sequence of instructions;
- and
- means for performing a tag array operation based on the selected first physical address to locate a tag array entry corresponding to the second instruction.
A non-transitory computer readable storage medium storing instructions that are executable within a processing system to:
- cause the processing system to receive an instruction of a sequence of instructions for execution, each of the sequence of instructions stored in memory;
- perform a lookup in a page crossing buffer to determine whether the page crossing buffer has an associated entry corresponding to the instruction, the page crossing buffer includes one or more entries, each of the one or more entries including an instruction address of a particular instruction and a physical address that corresponds to a next sequential instruction that follows the particular instruction in the sequence of instructions;
- and
- based on a determination that the page crossing buffer has an associated entry corresponding to the instruction:
- select a first physical address retrieved from the associated entry in the page crossing buffer, the first physical address corresponding to a second instruction that follows the instruction in the sequence of instructions;
- and
- perform a tag array operation based on the selected first physical address to locate a tag array entry corresponding to the second instruction.
Dependencies are inferred from the claim text.