Data processing apparatus and data processing method

A data processing method, utilized for a data processing apparatus to access a plurality of memories, comprising:

• recording a first memory address where a first function is implemented in a function control circuitry of the data processing apparatus after the first function is implemented;
• determining which one of the plurality of memories is a target memory according to the first memory address;
• and
• outputting the first memory address to the target memory, wherein the target memory is determined in the same processing cycle in which the first memory address is outputted.

A data processing apparatus for accessing a plurality of memories, wherein the data processing apparatus comprises:

• a core circuitry, utilized to output a fetch memory address;
• a function control circuitry, utilized to receive the fetch memory address and determine one of the plurality of memories as a target memory which the fetch memory address is located by recording the target memory when it is accessed;
• and
• an address generation circuitry, utilized to output the fetch memory address to the target memory.