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US 9,804,922 B2Granted
Partial bad block detection and re-use using EPWR for block based architectures
AssigneeSanDisk Technologies LLC
InventorsMrinal Kochar, Abhijeet Bhalerao, Derek McAuley, Piyush Sagdeo
Life of this patent
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Abstract
Systems and methods for partial bad block reuse may be provided. Data may be copied from a block of a first memory to a block of a second memory. A post write read error may be detected in a first portion the data copied to the block of the second memory without detection of a post write read error in a second portion of the data copied to the block of the second memory. The block of the second memory may be determined to be a partial bad block usable for storage in response to detection of the post write read error in the first portion of the data but not in the second portion of the data.
Claims19
A storage system comprising:
- a solid state memory comprising a first memory and a second memory;
- and
- a storage controller configured to:
- copy data from a logical block of the first memory to a logical block of the second memory;
- detect any post write read error in the data copied to the logical block of the second memory;
- determine that the logical block of the second memory is a partial bad block unusable for storage of a first portion of the data copied to the logical block of the second memory but usable for storage of a second portion of the data copied to the logical block of the second memory in response to detection of a post write read error in the first portion of the data copied to the logical block of the second memory and no post write read error in the second portion of the data copied to the logical block of the second memory;
- and
- update a logical-to-physical map, in response to a determination that the logical block of the second memory is the partial bad block due to detection of the post write read error in the first portion of the data, to indicate that the second portion of the data copied to the logical block of the second memory is stored in the logical block of the second memory and to indicate that the first portion of the data copied to the logical block of the second memory is stored in a location of the solid state memory other than the logical block of the second memory, the logical-to-physical map including a mapping between subsets of the logical block of the second memory and physical locations of the subsets of the logical block of the second memory.
5 more elements
A storage device comprising:
- a solid state memory comprising a first memory and a second memory;
- a means for copying data from a logical block of the first memory to a logical block of the second memory;
- a means for detecting any post write read error in the data copied to the logical block of the second memory;
- a means for determining that the logical block of the second memory is a partial bad block in response to detection of a post write read error in a first portion of the data and no post write read error in a second portion of the data, wherein the partial bad block is used to store the second portion of the data despite the detection of the post write read error but is not used to store the first portion of the data;
- and
- a means for updating, based on a determination that the logical block of the second memory is the partial bad block due to detection of the post write read error in the first portion of the data, a logical-to-physical map to indicate that the second portion of the data copied to the logical block of the second memory is stored in the logical block of the second memory and to indicate that the first portion of the data copied to the logical block of the second memory is stored in a portion of the solid state memory other than the logical block of the second memory, the logical-to-physical map including a mapping between subsets of the logical block of the second memory and corresponding physical locations of the subsets of the logical block of the second memory.
3 more elements
A method for partial bad block reuse, the method comprising:
- copying data from a logical block of a first memory to a logical block of a second memory;
- detecting a post write read error in a first portion the data copied to the logical block of the second memory without detection of a post write read error in a second portion of the data copied to the logical block of the second memory;
- determining that the logical block of the second memory is a partial bad block usable for storage of the second portion of the data in response to detection of the post write read error in the first portion of the data but not in the second portion of the data;
- and
- updating a logical-to-physical map to indicate that the second portion of the data copied to the logical block of the second memory is stored in the logical block of the second memory, which is the partial bad block, and to indicate that the first portion of the data copied to the logical block of the second memory is stored outside of the logical block of the second memory, the logical-to-physical map including a mapping between subsets of the logical block of the second memory and corresponding physical locations of the subsets of the logical block of the second memory.
2 more elements
Dependencies are inferred from the claim text.