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US 9,804,615 B2Granted
Low power bias scheme for mobile storage SOC
AssigneeSK hynix memory solutions inc.
InventorsJenn-Gang Chern, Mao-Ter Chen
Life of this patent
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Abstract
A voltage regulator, an active circuit, and a passive circuit is used. The active circuit is used to supply a reference signal as an input to the voltage regulator during a higher power mode. The passive circuit is used to supply a second reference signal as the input to the voltage regulator during a lower power mode, wherein the lower power mode consumes less power than the higher power mode.
Claims17
A system, comprising:
- a voltage regulator;
- an active circuit which supplies a reference signal as an input to the voltage regulator during a higher power mode;
- a passive circuit which supplies a second reference signal as the input to the voltage regulator during a lower power mode, wherein the lower power mode consumes less power than the higher power mode, and the lower power mode is off when the higher power mode is on;
- an output scaler adjusting an output of the voltage regulator in accordance with power modes including the higher power mode and lower power mode, and a scaled output of the voltage regulator is fed back to the voltage regulator, wherein the scaled output at the lower power mode is lower than the scaled output at the higher power mode;
- and
- a calibration circuit, the calibration circuit is coupled to both the active circuit and the passive circuit, and configured to calibrate during the higher power mode and be turned off during the lower power mode.
3 more elements
A method, comprising:
- using a voltage regulator;
- using an active circuit which supplies a reference signal as an input to the voltage regulator during a higher power mode;
- using a passive circuit which supplies a second reference signal as the input to the voltage regulator during a lower power mode, wherein the lower power mode consumes less power than the higher power mode, and the lower power mode is off when the higher power mode is on;
- using an output scaler adjusting an output of the voltage regulator in accordance with power modes including the higher power mode and lower power mode, and a scaled output of the voltage regulator is fed back to the voltage regulator, wherein the scaled output at the lower power mode is lower than the scaled output at the higher power mode;
- and
- using a calibration circuit, the calibration circuit is coupled to both the active circuit and the passive circuit, and configured to calibrate during the higher power mode and be turned off during the lower power mode.
3 more elements
Dependencies are inferred from the claim text.