Liquid crystal display device comprising transistor using oxide semiconductor
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorJun Koyama
Life of this patent
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Abstract
A liquid crystal display device with a novel structure is provided. Each pixel includes a first circuit for holding a high level (or low level) potential and a second circuit for holding a low level (or high level) potential. A semiconductor layer of a transistor included in each of the first and second circuits is an oxide semiconductor layer. The second circuit is reset when being supplied with the high level potential. Whether the high level potential held in the second circuit changes is controlled by a data voltage supplied to the first circuit. The potential held in the first circuit and the potential held in the second circuit are respectively supplied to a first transistor and a second transistor.
Claims18
A display device including a circuit implementing a circuit diagram comprising:
- a signal line configured to be supplied with a data voltage having a first potential and a second potential;
- a first circuit capable of holding the first potential at a first node and electrically connected to the signal line;
- a second circuit capable of holding the second potential at a second node and electrically connected to the first circuit;
- a first transistor comprising a first gate terminal, a first terminal, and a second terminal, wherein, in the circuit diagram, the first gate terminal of the first transistor is directly connected to the first node and configured to be supplied with the first potential;
- a second transistor comprising a second gate terminal, a third terminal, and a fourth terminal, wherein, in the circuit diagram, the second gate terminal of the second transistor is directly connected to the second node and configured to be supplied with the second potential;
- a display element comprising one electrode, wherein the one electrode of the display element is electrically connected to the first terminal of the first transistor and the third terminal of the second transistor;
- a first wiring configured to be supplied with a first signal and directly connected to the second terminal of the first transistor in the circuit diagram;
- and
- a second wiring configured to be supplied with a second signal and directly connected to the fourth terminal of the second transistor in the circuit diagram.
A liquid crystal display device including a circuit implementing a circuit diagram comprising:
- a signal line configured to be supplied with a data voltage having a first potential and a second potential;
- a reset signal line configured to be supplied with a reset signal;
- a scan signal line configured to be supplied with a scan signal;
- a first circuit comprising a first node and electrically connected to the signal line and the scan signal line;
- a second circuit comprising a second node and electrically connected to the reset signal line;
- a first transistor comprising a first gate terminal and a first terminal, wherein, in the circuit diagram, the first gate terminal of the first transistor is directly connected to the first node;
- a second transistor comprising a second gate terminal and second terminal, wherein in the circuit diagram, the second gate terminal of the second transistor is directly connected to the second node;
- and
- a liquid crystal element comprising one electrode, wherein the one electrode of the liquid crystal element is electrically connected to the first terminal of the first transistor and the second terminal of the second transistor,
- wherein the first circuit is configured so that the second potential is held at the first node in response to supply of the scan signal to the first circuit and then one of the first potential and the second potential is held at the first node in response to supply of the data voltage to the first circuit,
- wherein the second circuit is configured so that the first potential is held at the second node in response to supply of the reset signal to the second circuit and then the other of the first potential and the second potential is held at the second node in response to the supply of the data voltage to the first circuit, and
- wherein the first potential is higher than the second potential.
Dependencies are inferred from the claim text.