Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 2/15 and 64-symbol mapping, and bit interleaving method using same

A bit group-unit interleaver, comprising:

• a first memory configured to store a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15;
• a processor configured to generate an interleaved codeword by interleaving the LDPC codeword on a bit group basis, the size of the bit group corresponding to a parallel factor of the LDPC codeword;
• and
• a second memory configured to transmit the interleaved codeword corresponding to a modulator for 64-symbol mapping for generating a transmission signal, the transmission signal being transmitted over a wireless channel,
• wherein the interleaving is performed using the following equation using permutation order:
• Yj=Xπ(j)0≦j≦Ngroup
• where Xπ(j) is a π(j)th bit group, Yj is an interleaved j-th bit group, Ngroup is the number of bit groups obtained by dividing the LDPC codeword into the bit groups, and π(j) is a permutation order for bit group-based interleaving,
• wherein the permutation order corresponds to an interleaving sequence represented by the following equation:
• interleaving sequence={7 11 4 38 19 25 2 43 15 26 18 14 9 29 44 32 0 5 35 10 1 12 6 36 21 33 37 34 3 31 20 16 40 23 41 22 30 39 13 24 17 42 28 8 27}, and
• wherein the interleaving sequence is for a case where the 64-symbol mapping is employed and the interleaved codeword interleaved by the interleaving sequence distributes burst errors occurring in the wireless channel for the transmission signal, and a modulated signal output from the modulator corresponds to the transmission signal, the transmission signal being transmitted to a reception device.