Analog-to-digital conversion circuitry with real-time adjusted gain and resolution
AssigneeWestern Digital Technologies, Inc.
InventorsTimothy A. Ferris, Jaesoo Byoun
Life of this patent
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Abstract
Analog-to-digital conversion circuitry for generating a digital output signal is disclosed comprising a sample-and-hold circuit comprising an adjustable sample capacitor for coupling to an analog input signal during a sample phase, and an analog-to-digital converter (ADC) coupled to an output of the sample-and-hold circuit during a hold phase. In order to compensate in real-time for an increase in an amplitude of the input signal, a capacitance of the sample capacitor is decreased by an attenuation factor, and an output of the ADC is multiplied by an inverse of the attenuation factor to generate the digital output signal.
Claims16
Analog-to-digital conversion circuitry for generating a digital output signal, the analog-to-digital conversion circuitry comprising:
- a sample-and-hold circuit comprising an adjustable sample capacitor for coupling to an analog input signal during a sample phase;
- an analog-to-digital converter (ADC) coupled to an output of the sample-and-hold circuit during a hold phase;
- and
- control circuitry configured to compensate in real-time for an increase in an amplitude of the input signal by:
- decreasing a capacitance of the sample capacitor by an attenuation factor;
- and
- multiplying an output of the ADC by an inverse of the attenuation factor to generate the digital output signal.
A method of converting an analog input signal into a digital output signal, the method comprising compensating in real-time for an increase in an amplitude of the input signal by:
- decreasing by an attenuation factor a capacitance of a sample capacitor in a sample-and-hold (S/H) circuit configured to sample the analog input signal;
- and
- multiplying by an inverse of the attenuation factor an output of an analog-to-digital converter (ADC) coupled to the S/H circuit to generate the digital output signal.
A data storage device comprising:
- a head actuated over a disk;
- analog-to-digital conversion circuitry for generating a digital output signal, the analog-to-digital conversion circuitry comprising:
- a sample-and-hold circuit comprising an adjustable sample capacitor for coupling to an analog input signal during a sample phase;
- and
- an analog-to-digital converter (ADC) coupled to an output of the sample-and-hold circuit during a hold phase;
- and
- control circuitry configured to compensate in real-time for an increase in an amplitude of the input signal by:
- decreasing a capacitance of the sample capacitor by an attenuation factor;
- and
- multiplying an output of the ADC by an inverse of the attenuation factor to generate the digital output signal.
Dependencies are inferred from the claim text.