Mixed-radix and/or mixed-mode switch matrix architecture and integrated circuit, and method of operating same
AssigneeFlex Logix Technologies, Inc.
InventorCheng C. Wang
Life of this patent
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Abstract
An integrated circuit comprising a plurality of switch matrices wherein the plurality of switch matrices are arranged in stages including (i) a first stage, configured in a hierarchical network (for example, a radix-4 network), (ii) a second stage configured in a hierarchical network (for example, a radix-2 or radix-3 network) and coupled to switches of the first stage, and (iii) a third stage configured in a mesh network and coupled to switches of the first and/or second stages. In one embodiment, the third stage of switch matrices is located between the first stage and second stage of switch matrices; in another embodiment, the third stage is the highest stage.
Claims21
An integrated circuit comprising:
- a plurality of computing elements;
- a plurality of switches electrically interconnected and arranged in a plurality of switch matrices;
- and
- wherein the plurality of switch matrices are arranged in a plurality of stages including:
- a first stage of switch matrices configured in a hierarchical network,
- a second stage of switch matrices configured in a hierarchical network, and
- a third stage of switch matrices (i) wherein an output of each switch matrix of the third stage of switch matrices is directly connected to an input of at least one switch in each of a plurality of switch matrices of the third stage, and (ii) wherein each switch matrix of the plurality of switch matrices of the third stage is directly connected to only one switch matrix of the switch matrices of the first stage of switch matrices and/or only one of the switch matrix of the second stage of switch matrices.
An integrated circuit comprising:
- a plurality of computing elements;
- a mixed-mode interconnect network, including:
- a plurality of switch matrices, wherein (i) each switch matrix of the plurality of switch matrices includes at least one switch and (ii) the plurality of switch matrices are arranged in a plurality of stages including:
- a first stage of switch matrices, configured in a hierarchical network, and electrically connected to at least one computing element,
- a second stage of switch matrices configured in a hierarchical network and electrically coupled to one or more switches of the switch matrices of the first stage of switch matrices, and
- a third stage of switch matrices (i) configured in a mesh network, wherein each switch matrix of the third stage of switch matrices includes a plurality of inputs and a plurality of outputs and wherein each output of a plurality of the outputs of each switch matrix of the third stage of switch matrices is directly connected to an associated input of the plurality of inputs of a plurality of other switch matrices of the third stage and (ii) wherein each switch matrix of the third stage is directly connected to only one switch matrix of the first stage of switch matrices and/or only one switch matrix of the second stage of switch matrices.
An integrated circuit comprising:
- a plurality of computing elements;
- a plurality of switch matrices, wherein (i) each switch matrix includes at least one switch and (ii) the plurality of switch matrices are arranged in stages including:
- a plurality of stages of switch matrices, configured in a hierarchical network, wherein, each switch matrix of the plurality of stages is connected to a plurality of switch matrices of other stages, and
- a first mesh stage of switch matrices which is (i) configured in a mesh network wherein each switch matrix of the first mesh stage of switch matrices is directly connected to at least one switch in each of a plurality of other switch matrices of the first mesh stage and (ii) electrically and directly connected to one or more switches of less than or equal to two of the switch matrices of the plurality of stages of switch matrices.
Dependencies are inferred from the claim text.