Differential input buffer circuits and methods

A termination circuit comprising:

• a first operational amplifier circuit;
• a second operational amplifier circuit;
• first and second transistors that are coupled in parallel between a first pad and a first node;
• and
• a first resistor that is coupled between the first node and a second pad, wherein the first operational amplifier circuit controls a voltage drop across the first transistor based on a difference between a voltage at the first node and a first common mode voltage of input signals at the first and second pads, and wherein the second operational amplifier circuit controls a voltage drop across the second transistor based on a difference between the first common mode voltage of the input signals and a second common mode voltage of the input signals.

A method comprising:

• providing termination impedance to input signals received at first and second pads using a termination circuit, wherein the termination circuit comprises a first transistor coupled to the first pad and a first resistor coupled between the first transistor and the second pad;
• generating an output signal of a first operational amplifier circuit based on a difference between a first common mode voltage of the input signals at a first node between the first resistor and the first transistor and a second common mode voltage of the input signals at a second node, wherein the second node is a different node than the first node;
• and
• controlling the first transistor using the output signal of the first operational amplifier circuit to generate the first common mode voltage of the input signals at the first node.