Vertical vacuum channel transistor
AssigneesInternational Business Machines Corporation, Globalfoundries Inc., STMicroelectronics S.r.l.
InventorsQing Liu, Ruilong Xie, Chun-chen Yeh
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Abstract
A method of fabricating features of a vertical transistor include performing a first etch process to form a first portion of a fin in a substrate; depositing a spacer material on sidewalls of the first portion of the fin; performing a second etch process using the spacer material as a pattern to elongate the fin and form a second portion of the fin in the substrate, the second portion having a width that is greater than the first portion; oxidizing a region of the second portion of the fin beneath the spacer material to form an oxidized channel region; and removing the oxidized channel region to form a vacuum channel.
Claims6
A method of fabricating features of a vertical transistor, the method comprising:
- forming a fin in a substrate comprising a semiconductor material;
- oxidizing a portion of the semiconductor material of the fin such that an oxidized portion is arranged between a source and a drain;
- forming a gate stack on one side of the fin;
- removing the oxidized portion of the fin to form a vacuum channel opening, the vacuum channel opening contacting the gate stack;
- and
- performing a directional deposition process to deposit a dielectric on another side of the fin such that the vacuum channel opening remains open.
Dependencies are inferred from the claim text.