Semiconductor device

A semiconductor device having an active region through which current flows and an edge termination structure region in which a structure for reducing concentration of electric field is formed, the edge termination structure region being arranged outside of the active region, the semiconductor device comprising:

• a semiconductor substrate of a first conductivity type, having an upper surface and a lower surface;
• a first semiconductor layer of the first conductivity type, provided on the upper surface of the semiconductor substrate, and having an impurity concentration lower than that of the semiconductor substrate;
• a first semiconductor region of a second conductivity type, selectively provided in an upper surface of the first semiconductor layer, and extending from within the active region to within the edge termination structure region;
• a second semiconductor layer of the second conductivity type, having an impurity concentration lower than that of the first semiconductor region, and being provided on the upper surface of the first semiconductor layer, so as to cover the first semiconductor region;
• a second semiconductor region of the second conductivity type, having an impurity concentration lower than that of the first semiconductor region, constituting an edge termination structure, and being selectively provided farther outside of the active region than the first semiconductor region, in the upper surface of the first semiconductor layer;
• a third semiconductor region of the first conductivity type, selectively provided in the second semiconductor layer;
• a fifth semiconductor region of the second conductivity type, selectively provided in the second semiconductor layer;
• a gate insulating film contacting a region of the second semiconductor layer between the third semiconductor region and the first semiconductor layer;
• a gate electrode sandwiching the gate insulating film with the second semiconductor layer;
• a first electrode contacting the second semiconductor layer and the third semiconductor region;
• a second electrode on the lower surface of the semiconductor substrate;
• a step portion in a first area of the edge termination structure region between the second semiconductor layer and the first semiconductor layer;
• and
• a flat portion, in which the upper surface of the first semiconductor layer is exposed, disposed in a second area of the edge termination structure region farther outside of the active region than the first area, a portion of the first semiconductor region that is outermost relative to the active region, extending from the active region into the flat portion, a portion of the fifth semiconductor region that is outermost relative to the active region, extending within the flat portion and entirely covering an area of the flat portion in which the first semiconductor region extends.