Low miller factor semiconductor device

A semiconductor device, comprising:

• a substrate;
• an active layer disposed on the substrate;
• a source electrode and a drain electrode respectively and electrically connected to the active layer;
• a gate electrode disposed on the active layer and between the source electrode and the drain electrode, wherein the gate electrode has a first extending portion extending toward the drain electrode;
• a first metal layer partially disposed between the first extending portion of the gate electrode and the active layer, and extending toward the drain electrode, such that another portion of the first metal layer protrudes from the first extending portion, wherein the first metal layer is electrically connected to the source electrode;
• a second metal layer disposed above the first extending portion of the gate electrode and extending toward the drain electrode, such that another portion of the second metal layer protrudes from the first extending portion, wherein the second metal layer is electrically connected to the source electrode, wherein a horizontal distance between the second metal layer and the drain electrode is longer than or substantially equal to a horizontal distance between the first metal layer and the drain electrode;
• and
• a p-type doped layer disposed between the gate electrode and the active layer, wherein the first metal layer and the source electrode are respectively disposed on opposite sides of the p-type doped layer.