US 9,793,382 B2 · Manufacturing method of semiconductor device

Abstract

A semiconductor device and a method of manufacturing the same, the semiconductor device includes a fin shaped structure, a gate structure, an epitaxial layer, a germanium layer, an interlayer dielectric layer and a first plug. The fin shaped structure is disposed on a substrate. The gate structure is formed across the fin shaped structure. The epitaxial layer is disposed in the fin shaped structure adjacent to the gate structure. The germanium layer is disposed on the epitaxial layer. The interlayer dielectric layer covers the substrate and the fin shaped structure. The first plug is disposed in the interlayer dielectric layer to contact the germanium layer.

Claims12

Dependent claims

A method of forming a semiconductor device comprising:

providing a substrate having a fin shaped structure formed thereon;
forming a gate structure across the fin shaped structure;
forming a spacer surrounding the gate structure;
forming an epitaxial layer in the fin shaped structure adjacent to the gate structure;
forming an interlayer dielectric layer on the gate structure and the fin shaped structure;
forming a first opening in the interlayer dielectric layer to expose the epitaxial layer and the spacer;
and
forming a germanium layer on the epitaxial layer.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application

15/470,905Filed 28 Mar 2017 · division

Priority

CN 2015 1 058950416 Sep 2015

Published

US 2017/0077031 A113 Jul 2017

Granted

17 Oct 2017

Term ends

Not estimatedThe source records don’t support an estimate.

Classification19 codes

H10D 30/024
Of FETs having insulated gates [IGFET]: of fin field-effect transistors [FinFET]
H10D 30/62
Insulated-gate field-effect transistors [IGFET]: fin field-effect transistors [FinFET]
H10D 30/6219
Fin field-effect transistors [FinFET]: characterised by the source or drain electrodes
H10D 30/797
Arrangements for exerting mechanical stress on the crystal lattice of the channel regions: being in source or drain regions, e.g. SiGe source or drain

Manufacturing method of semiconductor device

Life of this patent

Manufacturing method of semiconductor device

Life of this patent

Abstract

Claims12