Multiple layer quantum well FET with a side-gate
AssigneeNorthrop Gumman Systems Corporation
InventorRoger S. Tsai
Life of this patent
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Abstract
An exemplary FET includes a substrate and multiple vertically stacked layer groups with each layer group having a quantum well semiconductive layer and a nonconductive layer adjacent the first quantum well semiconductive layer. Conductive source and drain electrodes in conductive contact with the semiconductive layers. A 3-dimensional ridge of the stacked layer groups is defined between spaced apart first and second trenches which are between the source and drain electrodes. A continuous conductive side gate is disposed on the sides and top of the ridge for inducing a field into the semiconductive layers. A gate electrode is disposed in conductive contact with the conductive side gate.
Claims19
A field effect transistor (FET) device comprising:
- a substrate;
- an initial nonconductive layer adjacent the substrate;
- a first layer group having a first quantum well semiconductive layer disposed on the initial nonconductive layer and a first nonconductive layer disposed over the first quantum well semiconductive layer;
- at least a second layer group having a second quantum well semiconductive layer disposed on the first nonconductive layer and a second nonconductive layer disposed over the second quantum well semiconductive layer, the second layer group being vertically stacked on top of the first layer group;
- a top nonconductive layer disposed on a topmost layer group;
- a source electrode in conductive contact with the first and second quantum well semiconductive layers;
- a drain electrode spaced apart from the source electrode and in conductive contact with the first and second quantum well semiconductive layers;
- a first trench disposed between the source and drain electrodes that creates access to first edges of at least all quantum well semiconductive layers;
- a second trench disposed between the source and drain electrodes generally parallel to and spaced apart from the first trench, the second trench creating access to second edges of at least all quantum well semiconductive layers that oppose the first edges;
- a 3-dimensional ridge defined by a portion of the first and second layer groups and the top nonconductive layer, the portion being between the first and second trenches;
- a continuous conductive side gate disposed on the first edges, the top nonconductive layer and the second edges, the continuous conductive side gate being generally perpendicular to the first and second trenches;
- a gate electrode disposed in conductive contact with the continuous conductive side gate.
A radio frequency amplifier implemented by a field effect transistor (FET) comprising:
- a FET structure means for producing a unity cutoff frequency of the FET that is at least 50% higher than a unity cutoff frequency of a transistor made of the same semiconducting material as the FET where the transistor has only a single semiconducting channel, the FET structure means comprising:
- at least first and second vertically stacked layer groups where each layer group has a nonconductive layer and a quantum well semiconductive layer adjacent the nonconductive layer;
- a source electrode in conductive contact with the semiconductive layers;
- a drain electrode spaced apart from the source electrode and in conductive contact with the semiconductive layers;
- a 3-dimensional ridge being a portion of the layer groups is disposed between the source and drain electrodes, the 3-dimensional ridge defined between spaced apart trenches, the 3-dimensional ridge having a top that intersects first and second sides defined by the respective trenches;
- a continuous conductive side gate disposed along the first and second sides and across the top of the 3-dimensional ridge;
- a gate electrode disposed in conductive contact with the continuous conductive side gate.
A radio frequency amplifier implemented by a field effect transistor (FET) comprising:
- a FET structure means for producing a linearity figure of merit based on 3rd order intermodulation intercept power divided by DC power that is more than 5 times more than a high electron mobility transistor having only a single semiconductive channel, the FET structure means comprising:
- at least first and second vertically stacked layer groups where each layer group has a nonconductive layer and a quantum well semiconductive layer adjacent the nonconductive layer;
- a source electrode in conductive contact with the semiconductive layers;
- a drain electrode spaced apart from the source electrode and in conductive contact with the semiconductive layers;
- a 3-dimensional ridge being a portion of the layer groups is disposed between the source and drain electrodes, the 3-dimensional ridge defined between spaced apart trenches, the 3-dimensional ridge having a top that intersects first and second sides defined by the respective trenches;
- a continuous conductive side gate disposed along the first and second sides and across the top of the 3-dimensional ridge;
- a gate electrode disposed in conductive contact with the continuous conductive side gate.
A radio frequency amplifier implemented by a field effect transistor (FET) comprising:
- a FET structure means for using less than 5 times as much DC power for operation as required for operation by a high electron mobility transistor having only a single semiconductive channel, the FET structure means comprising:
- at least first and second vertically stacked layer groups where each layer group has a nonconductive layer and a quantum well semiconductive layer adjacent the nonconductive layer;
- a source electrode in conductive contact with the semiconductive layers;
- a drain electrode spaced apart from the source electrode and in conductive contact with the semiconductive layers;
- a 3-dimensional ridge being a portion of the layer groups is disposed between the source and drain electrodes, the 3-dimensional ridge defined between spaced apart trenches, the 3-dimensional ridge having a top that intersects first and second sides defined by the respective trenches;
- a continuous conductive side gate disposed along the first and second sides and across the top of the 3-dimensional ridge;
- a gate electrode disposed in conductive contact with the continuous conductive side gate.
Dependencies are inferred from the claim text.