Tunnelling field effect transistor

A tunnelling field effect transistor, comprising a gate electrode layer, a gate dielectric layer, a source region, a connected region and a drain region, wherein

• the source region comprises a first source region and a second source region;
• the second source region comprises an inner layer source region and an outer layer source region, the first source region contacts the inner layer source region of the second source region in a first direction representing a direction along the channel of the transistor, the outer layer source region covers the inner layer source region in a second direction vertical to the first direction, the outer layer source region is isolated from the first source region;
• the connected region comprises an extension region and a high-resistance region covered by the extension region in the second direction;
• the second source region contacts the connected region in the first direction, the connected region contact the drain region in the first direction;
• the gate electrode layer covers the outer layer source region by the gate dielectric layer in the second direction, the gate dielectric layer covers the outer layer source region, the extension region and the drain region in the second direction;
• the doping types of materials of the inner layer source region and the outer layer source region are opposite, the width of forbidden band of the material of the inner layer source region is less than that of the outer layer source region;
• the doping types of materials of the outer layer source region, the extension region and the drain region is identical;
• and
• the contact surface formed by way of covering the inner layer source region by the outer layer source region is a curved surface.