Capacitor structures for semiconductor device

A semiconductor device comprising:

• a semiconductor substrate;
• and
• a composite capacitor structure on the semiconductor substrate,
• wherein the composite capacitor structure comprises at least a first and a second capacitor stack, each comprising a lower and an upper capacitor,
• wherein a first terminal of the lower capacitor in the first capacitor stack is connected to a second terminal of the upper capacitor in the second capacitor stack and a first terminal of the lower capacitor in the second capacitor stack is connected to a second terminal of the upper capacitor in the first capacitor stack;
• wherein the upper capacitor of the first stack is configured to be biased in the opposite direction to the upper capacitor of the second stack and the lower capacitor of the first stack is configured to be biased in the opposite direction to the lower capacitor of the second stack;
• and
• wherein the semiconductor device is configured according to one of the following two configurations:
• (i) dielectric material of the upper capacitor of the first and second stacks comprises a first dielectric material having a selected thickness, and the dielectric material of the lower capacitor of the first and second stacks comprises a second dielectric material having a selected thickness, wherein the first and second dielectric materials are different from one another;
• and
• (ii) dielectric material of the upper and lower capacitors of the first stack comprises a first dielectric material having a selected thickness, and the dielectric material of the upper and lower capacitors of the second stack comprises a second dielectric material having a selected thickness, wherein the first and second dielectric materials are different from one another;
• wherein the variation of the capacitance of the semiconductor device as a function of voltage includes a quadratic voltage coefficient;
• and
• wherein the contribution of the first capacitor stack to said quadratic voltage coefficient is countered by the contribution of the second capacitor stack to said quadratic voltage coefficient such that said quadratic voltage coefficient is minimized as a result of the selected one of said two configurations, the selected first and second dielectric materials, and said selected thicknesses of the first and second dielectric materials.