Insulating wall and method of manufacturing the same
AssigneeSTMicroelectronics (Crolles 2) SAS
InventorFrancois Roy
Life of this patent
Estimating the term…
Abstract
A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.
Claims12
A pixel, comprising:
- a semiconductor layer;
- a charge accumulation area extending in the semiconductor layer;
- a transistor having a source or drain region penetrating into said semiconductor layer from an upper surface down to a first depth;
- an insulating wall penetrating into said semiconductor layer from the upper surface and containing an insulated conductor connected to a node of application of a potential, the insulating wall comprising at least a portion provided with a deep insulating plug penetrating into the insulated conductor from the upper surface down to a second depth greater than the first depth;
- and
- wherein a continuous portion of the insulating wall laterally delimits, at least partially, the charge accumulation area and comprises a wall portion with the deep insulating plug at least partially laterally delimiting the source or drain region of said transistor.
A pixel, comprising:
- a semiconductor layer;
- a photosensitive area of the semiconductor layer that is at least partially surrounded by a first insulated conductor wall penetrating into said semiconductor layer from an upper surface of the semiconductor layer, wherein the first insulated conductor wall includes a first portion provided with a first insulating plug at said upper surface, said first insulating plug having a first depth, and a second portion provided with a second insulating plug at said upper surface, said second insulating plug having a second depth greater than the first depth;
- a memory area of the semiconductor layer that is at least partially surrounded by a second insulated conductor wall penetrating into said semiconductor layer from the upper surface of the semiconductor layer, wherein the second insulated conductor wall includes a first portion provided with the first insulating plug at said upper surface and a second portion provided with the second insulating plug;
- a transistor having a first conduction region formed by said memory area and a second conduction region separated from the first conduction region by a channel region, where said second portion of the second insulated conductor wall at least partially surrounds the second conduction region and channel region.
A pixel, comprising:
- a vertically pinned diode including a surface region doped with a first dopant type having a first depth from a top surface of a semiconductor layer doped with the first dopant type and a well region doped with a second dopant type and positioned within the semiconductor layer underneath the surface region;
- a transistor coupled to the vertically pinned diode and including a drain region doped with the second dopant type having a second depth from a top surface of a semiconductor layer, a channel region of the semiconductor layer doped with the first dopant type and an insulated gate over said channel region;
- wherein the second depth is greater than the first depth;
- a trench extending into said semiconductor layer from said top surface, said trench substantially completely surrounding said vertically pinned diode and the channel and drain regions of said transistor;
- an insulating liner on walls and a bottom of said trench;
- a conductive material within said trench;
- an insulating plug within said trench, wherein said insulating plug has third depth from said top surface at a first portion of said trench adjacent the vertically pinned diode and has a fourth depth from said top surface at a second portion of said trench adjacent the drain region;
- wherein the fourth depth is greater than the third depth, and the fourth depth is greater than the second depth.
Dependencies are inferred from the claim text.