Method of manufacturing semiconductor memory device having charge accumulation layer positioned between control gate electrode and semiconductor layer

A method of manufacturing a semiconductor memory device, the semiconductor memory device comprising:

• a plurality of control gate electrodes stacked above a substrate;
• a semiconductor layer having as its longitudinal direction a direction perpendicular to the substrate, the semiconductor layer facing the plurality of control gate electrodes;
• and a charge accumulation layer positioned between the control gate electrode and the semiconductor layer, the method comprising:
• alternately stacking a plurality of first insulating layers and first layers on the substrate to form a stacked body;
• forming an opening that penetrates some of the first insulating layers and the first layers of the stacked body;
• forming the charge accumulation layer on the inside of the opening;
• removing a portion of the stacked body positioned in a bottom portion of the opening;
• forming the semiconductor layer on the inside of the opening;
• after forming the semiconductor layer, removing the first layer;
• and
• forming the control gate electrode between a plurality of the first insulating layers adjacent in the direction perpendicular to the substrate.