High conductivity channel for 3D memory
AssigneeSanDisk Technologies LLC
InventorsLiang Pang, Jayavel Pachamuthu, Yingda Dong
Life of this patent
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Abstract
Disclosed herein is a 3D memory with vertical NAND strings, and method for fabricating the same. Each vertical NAND string has a source side select transistor having a body in contact with a single crystal silicon substrate. The NAND string channel is formed from silicon germanium (SiGe), which provides for greater electron mobility than silicon. The body of the source side select transistor comprises epitaxial crystalline silicon germanium (SiGe) in contact with the single crystal silicon substrate. By epitaxial crystalline SiGe it is meant that the crystalline SiGe has the same crystalline orientation as the single crystal silicon substrate.
Claims19
An apparatus comprising:
- a single crystal silicon substrate having a crystalline structure;
- a select transistor comprising:
- a body comprising crystalline silicon germanium (SiGe) having a crystalline structure in contact with the single crystal silicon substrate;
- and
- a string of memory cells having a string channel comprising silicon germanium in contact with the crystalline silicon germanium of the select transistor body, wherein the crystalline structure of the crystalline silicon germanium is aligned with the crystalline structure of the single crystal silicon substrate.
A method of fabricating an apparatus, the method comprising:
- forming a select transistor adjacent to a single crystal silicon substrate, comprising:
- forming a select transistor body comprising crystalline silicon germanium (SiGe) in contact with the single crystal silicon substrate, including forming a silicon rich buffer layer of silicon germanium in direct contact with the single crystal silicon substrate, wherein the silicon rich buffer layer is formed from Si1-x Gex, wherein x is less than 0.5;
- and
- forming a string of memory cells having a string channel comprising silicon germanium in contact with the crystalline silicon germanium of the select transistor body.
An apparatus comprising:
- a single crystal silicon substrate;
- a select transistor comprising:
- a body comprising crystalline silicon germanium (SiGe) in contact with the single crystal silicon substrate, wherein the body comprises a silicon rich buffer layer of silicon germanium in direct contact with the single crystal silicon substrate, wherein the silicon rich buffer layer is formed from Si1-x Gex, wherein x is less than 0.5;
- and
- a string of memory cells having a string channel comprising silicon germanium in contact with the crystalline silicon germanium of the select transistor body.
An apparatus comprising:
- a single crystal silicon substrate;
- a select transistor comprising:
- a body comprising crystalline silicon germanium (SiGe) in contact with the single crystal silicon substrate, wherein the body comprises a graded buffer layer of silicon germanium in contact with the single crystal silicon substrate, wherein concentration of germanium increases gradually in a direction away from the single crystal silicon substrate and concentration of silicon decreases gradually in the direction away from the single crystal silicon substrate;
- and
- a string of memory cells having a string channel comprising silicon germanium in contact with the crystalline silicon germanium of the select transistor body.
Dependencies are inferred from the claim text.