CMOS transistors including gate spacers of the same thickness

A semiconductor structure comprising:

• a first gate structure straddling a first semiconductor material portion on a substrate;
• a second gate structure straddling a second semiconductor material portion on said substrate;
• a first raised active region located on each side of said first gate structure and directly contacting a topmost surface and a sidewall surface of said first semiconductor material portion;
• a second raised active region located on each side of said second gate structure and directly contacting a topmost surface and a sidewall surface of said second semiconductor material portion;
• a dielectric stack directly contacting a topmost surface and a sidewall surface of said first raised active regions and said first gate structure, and not in physical contact with said second raised active regions;
• and
• a material layer including a dielectric material and in physical contact with said dielectric stack and a topmost surface and a sidewall surface of said second raised active regions, wherein said substrate comprises an insulator layer and a handle substrate, and wherein said first semiconductor material portion and said second semiconductor material portion have a bottommost surface in direct physical contact with a topmost surface of said insulator layer.