Fin-based semiconductor device including a metal gate diffusion break structure with a conformal dielectric layer

A fin-like field-effect transistor (FinFET) device, the device comprising:

• a substrate including a first active region and a second active region spaced apart from each other in a first direction;
• a first group of fins configured in the first active region, and a second group of fins configured in the second active region, each of the first group of fins and the second group of fins extending along a second direction substantially perpendicular to the first direction;
• one or more gates configured to extend over the first active region and the second active region along the first direction, the one or more gates including a first isolation gate and a functional gate;
• a first sidewall spacer disposed along the first isolation gate;
• a source/drain feature formed on a side of the first sidewall spacer and extending into the substrate to a first depth;
• and
• wherein a first height of the first isolation gate is greater than a second height of the first sidewall spacer of the first isolation gate,
• wherein the first isolation gate includes a dielectric layer and a metal gate layer, the first isolation gate formed in a trench in the substrate, the dielectric layer conformed to a side surface of the first sidewall spacer and extending along the first sidewall spacer and into the substrate such that the dielectric layer physically contacts the first sidewall spacer, the source/drain feature, and the substrate at a bottom of the trench, the metal gate layer extending into the substrate to a second depth that is greater than the first depth.

A semiconductor device, comprising:

• a substrate including a first active region and a second active region spaced apart from each other in a first direction;
• a first group of fins configured in the first active region, and a second group of fins configured in the second active region, each of the first group of fins and the second group of fins extending along a second direction substantially perpendicular to the first direction;
• and
• one or more gates configured to extend over the first active region and the second active region, each of the one or more gates extending along the first direction, the one or more gates including an isolation gate and a functional gate;
• a first sidewall spacer disposed along the isolation gate;
• a first source/drain feature formed on a side of the first sidewall spacer and extending into the substrate to a first depth;
• and
• wherein the isolation gate includes a dielectric layer and a metal gate layer, the isolation gate formed in a trench in the substrate, the dielectric layer conformed to a side surface of the first sidewall spacer and extending along the first sidewall spacer and into the substrate such that the dielectric layer physically contacts the first sidewall spacer, the first source/drain feature, and the substrate at a bottom of the trench, the metal gate layer extending into the substrate to a second depth that is greater than the first depth.