System and method for a switch having a normally-on transistor and a normally-off transistor
AssigneeInfineon Technologies Austria AG
InventorsBernhard Zojer, Matteo-Alessandro Kutschak
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Abstract
In accordance with an embodiment, a method includes conducting a reverse current through a first switch that includes a normally-on transistor coupled in series with a normally-off transistor between a first switch node and a second switch node. While conducting the reverse current, the first switch is turned-off by turning-off the normally-off transistor via a control node of the normally-off transistor and reducing a drive voltage of the normally-on transistor by decreasing a voltage between the control node of the normally-on transistor and a reference node of the normally-on transistor. After turning-off the first switch, a second switch coupled to the first switch is turned on.
Claims28
A method of operating a first switch coupled between a first switch node and a second switch node, the first switch comprising a normally-on transistor coupled in series with a normally-off transistor, the method comprising:
- conducting a reverse current through the first switch, wherein the reverse current corresponds to a positive voltage between the second switch node and the first switch node, and the reverse current flows from a source node of the normally-on transistor to a drain node of the normally-on transistor;
- turning-on the first switch comprising turning on the normally-on transistor via a control node of the normally-on transistor and turning-on the normally-off transistor via a control node of the normally-off transistor;
- while conducting the reverse current, turning off the first switch comprising turning-off the normally-off transistor via the control node of the normally-off transistor and reducing a drive voltage of the normally-on transistor by decreasing a voltage between the control node of the normally-on transistor and a reference node of the normally-on transistor;
- and
- turning on a second switch coupled between the first switch and a supply node after turning off the first switch.
A circuit comprising:
- a first driver terminal configured to be coupled to a control node of a normally-off transistor coupled in series with a normally-on transistor, wherein the normally-off transistor and the normally-on transistor form a first switch coupled between a first switch node and a second switch node;
- a second driver terminal configured to be coupled to a control node of a normally-on transistor;
- a third driver terminal configured to be coupled to a control node of a second switch coupled between the first switch and a supply node;
- and
- a driver circuit configured to:
- turn-on the normally-off transistor via the first driver terminal and turn-on the normally-on transistor via the second driver terminal,
- when the first switch conducts a reverse current, turn-off the first switch by turning-off the normally-off transistor via the first driver terminal and reducing a drive voltage of the normally-on transistor via the second driver terminal by decreasing a voltage between the control node of the normally-on transistor and a reference node, wherein the reverse current corresponds to a positive voltage between the second switch node and the first switch node, and the reverse current flows from a source node of the normally-on transistor to a drain node of the normally-on transistor;
- and
- turn on the second switch after turning off the first switch.
A circuit comprising:
- a normally-on transistor coupled in series with a normally-off transistor;
- a gate driving circuit having an output coupled to a control node of the normally-off transistor, wherein the gate driving circuit is configured to turn the normally-off transistor off for a first period of time;
- a capacitor coupled between the control node of the normally-off transistor and a control node of the normally-on transistor;
- a clamp circuit coupled between the control node of the normally-on transistor and a source node of the normally-off transistor;
- and
- a resistor coupled between the gate of the normally-on transistor and a source of the normally-off transistor, wherein a time constant of a capacitance of the capacitor multiplied by a resistance of the resistor is less than the first period of time.
Dependencies are inferred from the claim text.