Semiconductor element built-in wiring board and method for manufacturing the same

A wiring board having a built-in semiconductor element, comprising:

• a base substrate;
• a semiconductor element embedded in the base substrate and having an active surface and a non-active surface on an opposite side with respect to the active surface such that the semiconductor element has a terminal on the active surface;
• a first build-up layer comprising an insulating layer and a plurality of first conductor pads such that the insulating layer is formed on a non-active surface side of the semiconductor element and that the plurality of first conductor pads has a plurality of exposed surfaces exposed from a surface of the insulating layer on an opposite side with respect to the base substrate;
• and
• a second build-up layer comprising an insulating layer and a plurality of second conductor pads such that the insulating layer is formed on an active surface side of the semiconductor element and that the plurality of second conductor pads has a plurality of exposed surfaces exposed from a surface of the insulating layer on an opposite side with respect to the base substrate,
• wherein the insulating layer in the first build-up layer comprises a resin material and a reinforcing material, the insulating layer in the second build-up layer comprises a resin material and a reinforcing material, the plurality of first conductor pads is embedded in the insulating layer in the first build-up layer, the base substrate comprises a first conductor layer and a plane layer formed on the first build-up layer, a first base-substrate insulating layer formed on the first build-up layer and covering the first conductor layer and plane layer, a second conductor layer formed on the first base-substrate insulating layer, a second base-substrate insulating layer formed on the first base-substrate insulating layer and covering the second conductor layer, and a third base-substrate insulating layer formed on the second base-substrate insulating layer such that no conductor layer is interposed between the second base-substrate insulating layer and the third base-substrate insulating layer, the base substrate has a recess portion penetrating through the first and second base-substrate insulating layers such that the recess portion is exposing a portion of the plane layer and accommodating the semiconductor element in the recess portion, and the third base-substrate insulating layer is formed such that the third base-substrate insulating layer is embedding the semiconductor element in the recess portion.