Method for manufacturing device embedded substrate, and device embedded substrate
AssigneeMeiko Electronics Co., Ltd.
InventorsMitsuaki Toda, Tohru Matsumoto, Seiko Murata
Life of this patent
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Abstract
In a method for manufacturing a device embedded substrate, a conductive via that penetrates a first insulating layer and a second insulating layer from an outer metal layer to reach a second terminal of an IC device is formed after forming the outer metal layer.
Claims12
A method for manufacturing a device embedded substrate in which an IC device including a first terminal on a first surface side and a second terminal on a second surface side, the second surface side being less resistant to crack generation than the first surface side, the method comprising:
- a preparation step of preparing a support plate where a metal film is formed on a surface;
- a mounting step of mounting the IC device by joining the first terminal onto a surface of the metal film via an adhesive layer, and arranging the second terminal on an opposite side to the adhesive layer side;
- a first insulating layer formation step of forming a first insulating layer in which the IC device is embedded by laminating an insulating resin material so as to cover the metal film and the IC device;
- an inner metal layer formation step of forming an inner metal layer on a surface of the first insulating layer;
- an interconnection pattern formation step of forming a first terminal interconnection pattern by electrically connecting the first terminal and the metal film;
- a second insulating layer formation step of forming a second insulating layer by laminating an insulating resin material so as to cover the inner metal layer;
- an outer metal layer formation step of forming an outer metal layer on a surface of the second insulating layer;
- and a conductive via formation step of forming a conductive via that electrically connects the outer metal layer and the second terminal by forming a via that penetrates the first insulating layer and the second insulating layer from the outer metal layer to reach the second terminal and filling a conductor into the via.
A device embedded substrate comprising:
- a first insulating layer that contains an insulating resin material;
- an IC device that includes a first terminal on a first surface side and a second terminal on a second surface side, the second surface side being less resistant to crack generation than the first surface side, and that is embedded in the insulating layer;
- a first terminal interconnection pattern that electrically connects the first terminal of the IC device and an outer portion of the first insulating layer;
- an inner metal layer that is formed on an opposite side to a surface of the first insulating layer where the first terminal interconnection pattern is formed;
- a second insulating layer that contains an insulating resin material and that is formed so as to cover the inner metal layer;
- an outer metal layer that is formed on the second insulating layer;
- and a conductive via that penetrates the first insulating layer and the second insulating layer to electrically connect the outer metal layer and the second terminal, wherein a portion penetrating the first insulating layer and a portion penetrating the second insulating layer of the conductive via are formed in one step.
Dependencies are inferred from the claim text.